Modern SOCs provide amazing functionalities for various applications, in particular for mobile devices and PDAs with fast graphical display and communications. New applications for cell phone games, TV, and reliable transactions demand make the system and chip specifications even tighter while the fierce competition does not allow any long product development time. At the same time, as SOC developments move into the 90 nm process technology arena and beyond, even more technical barriers emerge due to ever increasing design complexity, rising cost of mask set generation with modifications required for desired pattern transfers, complex manufacturing and packaging, and reliability qualification. Process development has been facing various barriers of its own due to various physical limits and cost constraints. For instance, the gate oxide thickness can no longer be scaled as aggressively, if not at all, unless the high-K dielectric can be implanted at low cost and the reliability concern are removed. In this talk we will first briefly look at the history of IC technology, and then discuss challenging SOC issues in I/O bottleneck, power density, thermal management, subthreshold leakage currents, and design for manufacturability and yield.

For individual challenging issues, we will consider state-of-the-art innovations introduced to lower or overcome the barriers as in bidirectional I/O design, low power design, supply voltage management, leakage reducing circuit techniques, mathematically rigorous inverse map techniques for mask correction, and design optimization for minimal circuit sensitivity to process variations. In the last part of this talk, we will consider future tradeoffs between 3D and 2D SOCs in view of the SIP trends of stacking multiple thin chips with sophisticated packaging, the performance, the manufacturing cost, and the time to market.

Sung-Mo (Steve) Kang is Dean, Jack Baskin School of Engineering at the University of California, Santa Cruz. He received his Ph.D. degree in electrical engineering from the University of California at Berkeley in 1975. Until 1985 he was with AT&T Bell Laboratories at Murray Hill and Holmdel, and also served as a faculty member of Rutgers University. In 1985, he joined the University of Illinois at Urbana-Champaign where he was Professor of Electrical and Computer Engineering, Computer Science and Research Professor of Coordinated Science Laboratory and Beckman Institute for Advanced Science and Technology. From August 1995 to December 2000, he served as Head of the Department of Electrical and Computer Engineering. In January 2001, he joined the University of California at Santa Cruz as Dean of Baskin School of Engineering and Professor of Electrical Engineering.

He has served as a member of Board of Governors, Secretary and Treasurer, Administrative Vice President, and 1991 President of IEEE Circuits and Systems Society. He has served on the editorial boards of Proceeding of the IEEE, IEEE Transactions on Circuits and Systems, International Journal of Circuit Theory and Applications. In 1992-1994, he was the Founding Editor-in-Chief of the IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Dr. Kang is Fellow of IEEE, ACM and AAAS, a Foreign Member of National Academy of Engineering of Korea. He is recipient of the Mac E. Van Valkenburg Award of IEEE Circuits and Systems Society (2005), Outstanding Alumni Award in Electrical Engineering, UC Berkeley (2001), IEEE Third Millennium Medal (2000), SRC Technical Excellence Award (1999), IEEE CAS Society Golden Jubilee Medal (1999), KBS Award in Science and Technology (1998), IEEE Circuits and Systems Society Technical Achievement Award (1997), Humboldt Research Award for Senior US Scientists (1996), IEEE Graduate Teaching Technical Field Award (1996), IEEE Circuits and Systems Society Meritorious Service Award (1994), SRC Inventor Recognition Awards (1993, 1996), IEEE CAS Darlington Prize Paper Award (1993), ICCD Best Paper Award (1986), and Myril B. Reed Best Paper Award (1979). He holds 12 patents, published over 350 papers and co-authored nine books.

His current research interest includes low power VLSI design; optimization for performance, reliability and manufacturability; mixed-signal mixed-technology integrated system; modeling and simulation of semiconductor devices and circuits; optoelectronic circuits and fully optical network systems.