Dr. Sudhakar Pamarti
Assistant Professor
University of California, Los Angeles

Low transmitter power efficiency remains a major challenge in wireless communication systems and is aggravated by the demand for ever higher data rates. Transmitter architectures based on switching power amplifiers offer good efficiency but are known to suffer from limitations in envelope dynamic range, bandwidth, and linearity. Traditional mixed-signal and RF circuit design techniques are proving incapable of overcoming these limitations in the presence of IC fabrication errors and device non-linearity.

This talk describes digital signal processing (DSP) techniques that can enable efficient transmitter architectures that overcome many of the aforementioned problems. In particular, a digital transmitter architecture and an enabling wide bandwidth frequency/phase synthesizer are described. The techniques are a part of a larger class of digital signal conditioning techniques that subtly alter the statistics of the signals being processed to make them insensitive to circuit errors.

Dr. Sudhakar Pamarti is an assistant professor of electrical engineering at the University of California, Los Angeles, where he teaches and conducts research in the fields of mixed- signal circuit design and signal processing. Dr. Pamarti received the M.S. and the Ph.D. degrees in electrical engineering from the University of California at San Diego in 1999 and 2003, respectively, and the Bachelor of Technology degree in electronics and electrical communications engineering from the Indian Institute of Technology, Kharagpur in 1995.

Prior to joining UCLA, he has worked at Rambus Inc. (‘03-`05) and Hughes Software Systems (‘95-`97) developing high speed I/O circuits and embedded software and firmware for a wireless-in-local-loop communication system respectively. Dr. Pamarti has served on the editorial board of the IEEE Transactions on Circuits and Systems II and is a recipient of the U.S. National Science Foundation’s CAREER award.