CALL FOR PARTICIPATION
15th
Annual IEEE International ASIC/SOC Conference
September
25-28, 2002
RIT
Inn and Conference Center, Rochester, New Yorkt
 | Speakers: KEYNOTE SPEAKER Hirokazu Hashimoto NEC Corporation Chairman and CEO PLENARY SPEAKER Tom Bednar, Senior Technical Staff Member, IBM Microelectronics BANQUET SPEAKER Dr. Kumar Krishen, NASA Chief Technologist for Technology Transfer and Commercialization, "New Technologies That Can Support Human Exploration of Space" |
| Summary: Driven by the rapid growth of the Internet, communication technologies, pervasive computing, and wireless and portable consumer electronics, Sys- tems-on-Chip (SoC) have become a dominant issue in today's ASIC industry. The transition from traditional Application-Specific-Integrated-Circuits (ASIC) to SoCs has created new challenges in Design Methods, Design Tools, Design Automation, Manufacturing, Technology and Test. The ASIC/SoC Confer- ence provides a forum for sharing advances in ASIC and SoC technology and applications. The 2002 Conference will offer three days of technical papers and a full day of technical workshops. The IEEE Circuits and Systems Soci- ety sponsors the ASIC/SoC Conference. GENERAL INFORMATION This year's ASIC/SOC Conference will be held at the Rochester Institute of Technology Inn and Conference Center. Rochester New York is served by the Greater Rochester International Airport and is within easy driving distance of the Buffalo International Airport and most of New England. Accommoda- tions will be available for $79.00 a night at the RIT Inn. Rochester, the third largest urban area in New York State, offers a wide range of cul- tural, historic, and recreational activities within the relaxed atmosphere of upstate New York. TECHNICAL SESSIONS ASIC/SoC 2002 will cover 25 technical sessions comprised of 89 full-papers on SOC DSP Techniques, Multimedia Audio, Memory and Processors, SOC Plan- ning and Verification, Data Converters, DSP Power Modeling and Management, Multimedia Video, SOC Migration Evaluation and Exploration, Mixed-Signal Design, Low-Power CMOS Design, On-Chip Buses, SOC Implementation, Network- ing, System Level Low-Power Wireless, SOC Physical Design, Deep Sub-Micron Technology, Physical Level Interconnects, and High Performance Intercon- nects. 32 posters will be presented in the poster session. |
| CONFERENCE REGISTRATION: Please visit the Conference web site at http://asic.union.edu to review the advanced program and register. Contact the ASIC/SoC Conference office at 301-527-0900 x104 for additional conference information and corporate participation. |
| ORGANIZING COMMITTEE: General Chair Technical Chair Technical Co-Chair P. R. Mukund John Chickanosky Dong Ha RIT IBM Virginia Tech prmeee@rit.edu chickano@us.ibm.com ha@vt.edu Pubs/Publicity Chair Steering Committee Chair Workshop Chair Richard Auletta Thomas Buchner Ram Krishnamurthy LSI Logic IBM Boblingen Lab Intel Corporation rauletta@acm.org tbuechner@de.ibm.com ramk@hf.intel.com Sponsored by the IEEE Circuits and Systems Society
The Institute of Electrical and Electronics Engineers,
Toronto Section Send comments to tor.sect@tor.ieee.org |
